Computer systems typically include one or more system busses which permit communication of data and control signals between processors and various functionality of the computer system. In computer systems which incorporate more than a single bus a bridge is frequently used to interface between busses. The speed at which a bus must operate is determined in part by the speed at which processors connected to the bus operate. Bus speeds have steadily increased with a corresponding increase in processor operating speeds.
Computer system busses are essentially a grouping of signal transmission lines. Therefore, they experience various performance related problems common to signal transmission lines as operating speeds increase. For example, any circuitry, electrical components, physical connectors or other connections to a bus signal line create a discontinuity which generates reflections to electrical signals transmitted on the bus signal line thereby affecting the performance of the bus. Using proper terminations on the signal lines minimizes reflections and attenuates other performance related problems such as cross-talk between bus lines. In the past, busses operated at relatively slow speeds requiring a simple in-line topology which was easily terminated. Today busses, which support high speed processors, however, increasingly require specially designed busses incorporating elaborate topologies and custom designed termination schemes.
A multiprocessor system which is currently gaining wide acceptance in the computer industry incorporates one or more Intel Pentium II Xeon processors which communicate with each other across an Intel Slot 2 bus and which further communicate with auxiliary devices via a bridge which communicates with the auxiliary devices across other types of busses. The Intel Slot 2 bus includes a System Management (SM) Bus, a P6 Gunning Transceiver Logic (P6 GTL) Bus, a boundary-scan JTAG bus, various status signals and various test lines.
Due in part to high operating speeds, Intel, the manufacturer of the Intel Pentium II Xeon processor, requires that computer systems using multiple Xeon processors be configured in a star configuration with a central interface bridge and that unpopulated Intel Slot 2 connectors be populated with a terminator card having an appropriate termination for each signal line on the Intel Slot 2 bus. The terminations are also specified by Intel and are specifically designed for the Intel Slot 2 bus. Intel, which developed and manufactures the Pentium II Xeon processor, is recognized as an authority in the design and use of the Pentium II Xeon processor including the configuration and termination of the Intel Slot 2 bus using the Pentium II Xeon processor.
Because of the speed at which the Intel Pentium II Xeon processor and Intel Slot 2 bus operate and because of the small voltage swing of signals communicated across the Intel Slot 2 bus as compared to past technology, computer manufacturers follow the requirements of Intel and configure the Intel Slot 2 bus in a star configuration and terminate all unpopulated connector slots on the Intel Slot 2 bus with terminations as specified by Intel. Use of a star configuration, however, requires considerable "real estate" on the motherboard to implement and complicates the layout and routing of signals on the motherboard. Furthermore, the use of terminator cards inserted in each unused Intel Slot2 bus connector and populated with components and electrical traces to terminate the Intel Slot 2 bus in accordance with Intel's requirements increases the cost of the computer system. It would be advantageous therefore, to devise a bus configuration which requires less space to implement and a method for bus line termination which requires few components and electrical traces.